Alif Semiconductor /AE722F80F55D5AS_CM55_HE_View /I3C /I3C_SLV_CHAR_CTRL

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Interpret as I3C_SLV_CHAR_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MAX_DATA_SPEED_LIMIT)MAX_DATA_SPEED_LIMIT 0 (IBI_REQUEST_CAPABLE)IBI_REQUEST_CAPABLE 0 (HDR_CAPABLE)HDR_CAPABLE 0DEVICE_ROLE 0DCR0HDR_CAP

Description

I3C Slave Characteristic Register

Fields

MAX_DATA_SPEED_LIMIT

Max Data Speed Limitation Specifies whether or not I3C has maximum data speed limitation. If this bit is set to 0x0, controller NACKed the GETMXDS CCC sent by master. If this bit is set to 0x1, controller returns the data in I3C_MAX_DATA_SPEED and I3C_MAX_READ_TURNAROUND registers in response the GETMXDS CCC sent by master. The field is reset to its default value upon I3C Reset.

IBI_REQUEST_CAPABLE

IBI Request Capable field in I3C_DEV_CHAR_TABLE1_LOC3[BCR] field 1.

HDR_CAPABLE

Programming this bit to 0x0 does not disable the HDR feature itself. This bit can be modified by the application if it does not want to advertize slaves HDR capability to master. The field is Reset to its default value upon I3C reset.

DEVICE_ROLE

This field is set to 0x1 by default. The field is reset to its default value upon I3C reset.

DCR

I3C Device Characteristic Value.

HDR_CAP

I3C Device HDR Capability Field Value. Others: Reserved

1 (Val_0x1): HDR Mode 0

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